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QuickLogic signs eFPGA IP partnership agreement with Yu-Hsin Layout Technology
The Fly

QuickLogic signs eFPGA IP partnership agreement with Yu-Hsin Layout Technology

QuickLogic announced that it has signed an embedded FPGA IP agreement with Yu-Hsin Layout Technology, based in Zhubei City, Taiwan. This agreement allows Yu-Hsin to utilize QuickLogic’s eFPGA IP technology to add eFPGA integration to their wide array of design services. The agreement is effective immediately and QuickLogic’s eFPGA IP technology is available now, enabling Yu-Hsin to quickly and easily target eFPGA IP to nearly any foundry and process node for fast and efficient SoC integration.

Published first on TheFly

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